Amd athlon k7 processor: AMD Athlon (K7) — CPU MUSEUM

26 февраля, 2021

AMD Athlon (K7) — CPU MUSEUM

K6-III ◄ Athlon (K7) ► Athlon XP

AMD Athlon K7 © HARDWARECOP

Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD). The original Athlon was the first seventh-generation x86
processor and, in a first, retained the initial performance lead it had over Intel’s competing processors for a significant period of time. The
original Athlon also had the distinction of being the first desktop processor to reach speeds of one gigahertz (GHz). AMD has continued using the Athlon name with the Athlon 64, an eighth-generation processor featuring x86-64 (later renamed AMD64) architecture, and the Athlon II.

The Athlon Pluto/Orion is a cartridge-based processor, named Slot A and similar to Intel’s cartridge Slot 1 used for Pentium II and
Pentium III. It used the same, commonly available, physical 242 pin connector used by Intel Slot 1 processors but rotated by 180 degrees to connect
the processor to the motherboard.

AMD-K7800CPRBCA
Specification Details 		Show
AMD-K7900MNR53B A
Specification Details 		Show

The second generation Athlon, the Thunderbird, debuted on June 5, 2000. This version of the Athlon shipped in a more traditional pin-grid array (PGA) format that plugged into a socket
(«Socket A») on the motherboard (it also shipped in the slot A package). It was sold at speeds ranging from 600 MHz to 1. 4 GHz (Athlon Classics using the Slot A package could clock up to 1 GHz).
The major difference, however, was cache design. Just as Intel had done when they replaced the old Katmai-based Pentium III with the much
faster Coppermine-based Pentium III, AMD replaced the 512 kB external reduced-speed cache of the Athlon Classic with 256 kB of on-chip, full-speed exclusive cache. As a general rule,
more cache improves performance, but faster cache improves it further still.

A0700MPR24B
Specification Details 		Show

Kindly donated by Pauli Rautakorpi.

A0800AMT3B
Specification Details 		Show
A0900AMT3B
Specification Details 		Show
A0950AMT3B
Specification Details 		Show

CPU-Z:

A1000AMT3B
Specification Details 		Show
A1000AMT3C
Specification Details 		Show

Kindly donated by Pauli Rautakorpi.

A1133AMS3C
Specification Details 		Show
A1200AMS3B
Specification Details 		Show
A1200AMS3C
Specification Details 		Show

Kindly donated by Pauli Rautakorpi.

A1333AMS3C
Specification Details 		Show
A1400AMS3C
Specification Details 		Show

Unlisted models:

 

  • Argon: 500 MHz, 550 MHz, 600 MHz, 650 MHz, 700 MHz
  • Pluto/Orion: 550 MHz, 600 MHz, 650 MHz, 700 MHz, 750 MHz, 850 MHz, 950 MHz, 1000 MHz
  • Thunderbird: 600 MHz, 650 MHz, 700 MHz, 750 MHz, 850 MHz, 1100 MHz, 1266 MHz, 1300 MHz

 

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K7 — Microarchitectures — AMD

K7 was the microarchitecture for AMD’s Athlon and Duron families of microprocessors as a successor to the K6-III. K7 was superseded by K8 in 2003.

K7 was originally manufactured on AMD’s 180 nm process. By late 2002, AMD transitioned to a 130 nm process.

K7 was a relatively new design by AMD which marked a departure from the aging Socket 7 and Super Socket 7. The new architecture introduced a number of major changes including a new propietary unified Socket A.

AMD used a split L1$ and a unified L2$. While originally K7 had an L2$ controller on-die with the actual cache off-chip, AMD moved the L2$ on-die the following year.

Both AMD’s and Intel’s original models did not feature on-die L2$. When compared to Intel’s original Pentium III L1 which was 32 KiB (albeit at higher associativity), K7 had superior performance due to having 4 times as much cache. By the following year AMD moved the cach on-die. With the introduction of the Coppermine models, Intel moved the L2$ on-die as well with half of K7’s latency. This change allowed Pentium models to outperform Athlon for certain workloads.

K7 Chips
Model Family Core Launched TDP VCORE Freq Max Mem
ZZZZZUniprocessors
Athlon XP-M 1000 Athlon XP-M Thoroughbred 16 W

16,000 mW
0.0215 hp
0.016 kW

1.2 V

12 dV
120 cV
1,200 mV

1,000 MHz

1 GHz
1,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1200+ Athlon XP-M Thoroughbred 16 W

16,000 mW
0.0215 hp
0.016 kW

1.2 V

12 dV
120 cV
1,200 mV

1,000 MHz

1 GHz
1,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1300+ Athlon XP-M Thoroughbred 16 W

16,000 mW
0. 0215 hp
0.016 kW

1.1 V

11 dV
110 cV
1,100 mV

1,100 MHz

1.1 GHz
1,100,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1300+ Athlon XP-M Thoroughbred 16 W

16,000 mW
0.0215 hp
0.016 kW

1.15 V

11.5 dV
115 cV
1,150 mV

1,100 MHz

1.1 GHz
1,100,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1400+ Athlon XP-M Thoroughbred 12 March 2003 16 W

16,000 mW
0.0215 hp
0.016 kW

1.1 V

11 dV
110 cV
1,100 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1400+ Athlon XP-M Thoroughbred 12 March 2003 16 W

16,000 mW
0. 0215 hp
0.016 kW

1.1 V

11 dV
110 cV
1,100 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1400+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.3 V

13 dV
130 cV
1,300 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1400+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.3 V

13 dV
130 cV
1,300 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1400+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0. 0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1400+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1500+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.3 V

13 dV
130 cV
1,300 mV

1,333 MHz

1.333 GHz
1,333,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1500+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0. 0335 hp
0.025 kW

1.3 V

13 dV
130 cV
1,300 mV

1,333 MHz

1.333 GHz
1,333,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1500+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,333 MHz

1.333 GHz
1,333,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1500+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,333 MHz

1.333 GHz
1,333,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1500+ Athlon XP-M Thoroughbred 12 March 2003 16 W

16,000 mW
0. 0215 hp
0.016 kW

1.1 V

11 dV
110 cV
1,100 mV

1,333 MHz

1.333 GHz
1,333,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1600+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1600+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.3 V

13 dV
130 cV
1,300 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1600+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0. 0335 hp
0.025 kW

1.3 V

13 dV
130 cV
1,300 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1600+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1700+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,467 MHz

1.467 GHz
1,467,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1800+ Athlon XP-M Thoroughbred 12 March 2003 25 W

25,000 mW
0. 0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,533 MHz

1.533 GHz
1,533,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1800+ Athlon XP-M Thoroughbred 12 March 2003 35 W

35,000 mW
0.0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,533 MHz

1.533 GHz
1,533,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1800+ Athlon XP-M Barton 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1800+ Athlon XP-M Barton 35 W

35,000 mW
0. 0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1900+ Athlon XP-M Barton 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,467 MHz

1.467 GHz
1,467,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 1900+ Athlon XP-M Thoroughbred 17 June 2003 35 W

35,000 mW
0.0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,600 MHz

1.6 GHz
1,600,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2000+ Athlon XP-M Barton 25 W

25,000 mW
0. 0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,533 MHz

1.533 GHz
1,533,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2000+ Athlon XP-M Thoroughbred 17 June 2003 35 W

35,000 mW
0.0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,667 MHz

1.667 GHz
1,667,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2000+ Athlon XP-M Barton 35 W

35,000 mW
0.0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,533 MHz

1.533 GHz
1,533,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2100+ Athlon XP-M Barton 17 March 2004 25 W

25,000 mW
0. 0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,600 MHz

1.6 GHz
1,600,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2100+ Athlon XP-M Barton 17 March 2004 25 W

25,000 mW
0.0335 hp
0.025 kW

1.25 V

12.5 dV
125 cV
1,250 mV

1,600 MHz

1.6 GHz
1,600,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2200+ Athlon XP-M Barton 19 July 2004 35 W

35,000 mW
0.0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,667 MHz

1.667 GHz
1,667,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2200+ Athlon XP-M Barton 19 July 2004 27 W

27,000 mW
0. 0362 hp
0.027 kW

1.3 V

13 dV
130 cV
1,300 mV

1,667 MHz

1.667 GHz
1,667,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2200+ Athlon XP-M Barton 19 July 2004 25 W

25,000 mW
0.0335 hp
0.025 kW

1.3 V

13 dV
130 cV
1,300 mV

1,667 MHz

1.667 GHz
1,667,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2400+ Athlon XP-M Barton 35 W

35,000 mW
0.0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,800 MHz

1.8 GHz
1,800,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 2600+ Athlon XP-M Barton 35 W

35,000 mW
0. 0469 hp
0.035 kW

1.35 V

13.5 dV
135 cV
1,350 mV

1,833 MHz

1.833 GHz
1,833,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon XP-M 950 Athlon XP-M Thoroughbred 16 W

16,000 mW
0.0215 hp
0.016 kW

1.2 V

12 dV
120 cV
1,200 mV

950 MHz

0.95 GHz
950,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1000 Duron Morgan 17 December 2001 25 W

25,000 mW
0.0335 hp
0.025 kW

1.4 V

14 dV
140 cV
1,400 mV

1,000 MHz

1 GHz
1,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1000 Duron Morgan 20 August 2001 46. 1 W

46,100 mW
0.0618 hp
0.0461 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,000 MHz

1 GHz
1,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1100 Duron Morgan 30 January 2002 1.55 V

15.5 dV
155 cV
1,550 mV

1,100 MHz

1.1 GHz
1,100,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1100 Duron Morgan 1 October 2001 50.3 W

50,300 mW
0.0675 hp
0.0503 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,100 MHz

1.1 GHz
1,100,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1200 Duron Morgan 30 January 2002 1. 45 V

14.5 dV
145 cV
1,450 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1200 Duron Morgan 15 November 2001 54.7 W

54,700 mW
0.0734 hp
0.0547 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1300 Duron Morgan 30 January 2002 1.5 V

15 dV
150 cV
1,500 mV

1,300 MHz

1.3 GHz
1,300,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1300 Duron Morgan 21 January 2002 60 W

60,000 mW
0.0805 hp
0.06 kW

1. 75 V

17.5 dV
175 cV
1,750 mV

1,300 MHz

1.3 GHz
1,300,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1400 Duron Applebred 15 August 2003 57 W

57,000 mW
0.0764 hp
0.057 kW

1.5 V

15 dV
150 cV
1,500 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1600 Duron Applebred 15 August 2003 57 W

57,000 mW
0.0764 hp
0.057 kW

1.5 V

15 dV
150 cV
1,500 mV

1,600 MHz

1.6 GHz
1,600,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 1800 Duron Applebred 15 August 2003 57 W

57,000 mW
0. 0764 hp
0.057 kW

1.5 V

15 dV
150 cV
1,500 mV

1,800 MHz

1.8 GHz
1,800,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 550 Duron Spitfire 19 June 2000 25.4 W

25,400 mW
0.0341 hp
0.0254 kW

1.6 V

16 dV
160 cV
1,600 mV

550 MHz

0.55 GHz
550,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Duron 600 Duron Spitfire 19 June 2000 22.7 W

22,700 mW
0.0304 hp
0.0227 kW

1.5 V

15 dV
150 cV
1,500 mV

600 MHz

0.6 GHz
600,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

ZZZZZUniprocessors
Athlon MP 1000 Athlon MP Palomino 5 June 2001 46. 1 W

46,100 mW
0.0618 hp
0.0461 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,000 MHz

1 GHz
1,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 1200 Athlon MP Palomino 5 June 2001 1.55 V

15.5 dV
155 cV
1,550 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 1200 Athlon MP Palomino 5 June 2001 54.7 W

54,700 mW
0.0734 hp
0.0547 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 1200 Athlon MP Palomino 5 June 2001 1. 8 V

18 dV
180 cV
1,800 mV

1,200 MHz

1.2 GHz
1,200,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 1500+ Athlon MP Palomino 15 October 2001 60 W

60,000 mW
0.0805 hp
0.06 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,333 MHz

1.333 GHz
1,333,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 1600+ Athlon MP Palomino 15 October 2001 62.8 W

62,800 mW
0.0842 hp
0.0628 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,400 MHz

1.4 GHz
1,400,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 1800+ Athlon MP Palomino 15 October 2001 66 W

66,000 mW
0. 0885 hp
0.066 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,533 MHz

1.533 GHz
1,533,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 1900+ Athlon MP Palomino 12 December 2001 66 W

66,000 mW
0.0885 hp
0.066 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,600 MHz

1.6 GHz
1,600,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2000+ Athlon MP Palomino 13 March 2002 66 W

66,000 mW
0.0885 hp
0.066 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,667 MHz

1.667 GHz
1,667,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2000+ Athlon MP Thoroughbred 27 August 2002 58. 2 W

58,200 mW
0.078 hp
0.0582 kW

1.6 V

16 dV
160 cV
1,600 mV

1,667 MHz

1.667 GHz
1,667,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2000+ Athlon MP Thoroughbred 27 August 2002 1.65 V

16.5 dV
165 cV
1,650 mV

1,667 MHz

1.667 GHz
1,667,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2100+ Athlon MP Palomino 19 June 2002 66 W

66,000 mW
0.0885 hp
0.066 kW

1.75 V

17.5 dV
175 cV
1,750 mV

1,733 MHz

1.733 GHz
1,733,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2200+ Athlon MP Thoroughbred 27 August 2002 60 W

60,000 mW
0. 0805 hp
0.06 kW

1.65 V

16.5 dV
165 cV
1,650 mV

1,800 MHz

1.8 GHz
1,800,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2400+ Athlon MP Thoroughbred 10 December 2002 1.6 V

16 dV
160 cV
1,600 mV

2,000 MHz

2 GHz
2,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2400+ Athlon MP Thoroughbred 10 December 2002 60 W

60,000 mW
0.0805 hp
0.06 kW

1.65 V

16.5 dV
165 cV
1,650 mV

2,000 MHz

2 GHz
2,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2600+ Athlon MP Thoroughbred 4 February 2003 60 W

60,000 mW
0. 0805 hp
0.06 kW

1.65 V

16.5 dV
165 cV
1,650 mV

2,133 MHz

2.133 GHz
2,133,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2600+ Athlon MP Barton 6 May 2003 60 W

60,000 mW
0.0805 hp
0.06 kW

1.6 V

16 dV
160 cV
1,600 mV

2,000 MHz

2 GHz
2,000,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Athlon MP 2800+ Athlon MP Barton 6 May 2003 60 W

60,000 mW
0.0805 hp
0.06 kW

1.6 V

16 dV
160 cV
1,600 mV

2,133 MHz

2.133 GHz
2,133,000 kHz

4,096 MiB

4,194,304 KiB
4,294,967,296 B
4 GiB
0.00391 TiB

Count: 94

The first generation of AMD K7, now just history

September 9, 2005, Friday
00:19

I. N.

for section
Laboratory

My recently released
the first work dedicated to AMD processors. The article covered modern processors of the K7 generation (all Duron, Sempron and Athlon XP) and the new K8. However, in the forum dedicated to the discussion of this work, wishes began to appear to expand the article and describe older processors. Today’s article is purely about old Slot A and Socket A processors in addition to the first one.

The history of the K7 architecture began with a presentation by Dirk Meyer at the Microprocessor Forum at 1998 of a new core codenamed Argon. The first Athlon Model 1 (K7) based on the Pluto core (however, the core of younger models was sometimes called the Argon name) with a 250nm manufacturing process was announced on June 23, 1999 and was released in August of the same year. A little later, Athlon Model 2 (K75) appeared on the Orion core with a 180nm process technology.

In general, the technical innovations of the first K7 processors are as follows:

  • the maximum processor core temperature is 70°C
  • First level cache (L1) is 128 KB (64 KB for data and 64 KB for instructions)
  • instruction set 3DNow! extended to 45 commands (Enhanced 3DNow!)
  • extended, compared to previous generations, block MMX instructions
  • There are three integer calculation pipeline units, which allows the execution of three integer instructions simultaneously
  • There are three Floating Point Units (FPUs) that allow three floating point instructions to be executed simultaneously
  • manufacturing process 250 nm, a little later — 180 nm.

    • The

Athlon «B» 1000 Thunderbird with 100 MHz bus and 1 GHz along with 900 and 950 MHz models was announced on March 6, 2000, two days before the PIII 1GHz, becoming the world’s first «home» gigahertz processor.

The first chipset was AMD’s own 750 chipset. It consisted of the AMD 751 northbridge and the AMD 756 southbridge. Later, the VIA KX133 chipset also came out — it added support for AGP 4X and PC133 memory (up to 2GB). The next AMD 760 chipset changed the type of memory used to DDR (DDR1600 and DDR2100). Its problem was the lack of the possibility of asynchronous clocking of the bus and memory frequencies — and the processor and memory had to work synchronously at a bus frequency of 200 or 266 MHz, up to 4 GB of memory was supported. For Socket A, VIA released an updated version of its chipset — KT133 (in fact, only the northbridge was redesigned, the southbridge remained the same), a little later than KT133A (support for FSB266 was added). All other specs are the same as the KX133.

Pluto and Orion have a 512 KB Level 2 (L2) cache located on the processor board and operating at a partial processor frequency. The board itself is packed in a special cartridge. The bus frequency is 100 MHz, but data is being transmitted on both edges of the signal (DDR), so the effective data rate is 200 MHz.



AMD K75-Athlon Orion


Athlon Thunderbird Slot A

In 2000, Model 4 Thunderbird Slot A was released. Its main difference is that the cache is integrated into the processor core and operates at its full frequency, but its size is reduced to 256 kb. The technical process is 180 nm. It should be noted that this model was planned for computer manufacturers, and not for the retail market.



GoldFinger («Golden Finger») — this module was used to overclock Slot A processors, allowing you to change the multiplier and voltage, the only disadvantage of using it is the need to open the cartridge and, as a result, the loss of warranty.

Model Core Process (nm) FSB (MHz) L2 cache frequency (MHz) Level 2 cache (L2) Core voltage (V) Maximum heat dissipation (W) Maximum current consumption (A)
Athlon 500 Pluto 250 100 250 512 1. 6 42 27.4
Athlon 550 Pluto 250 100 275 512 1.6 46 30.1
Orion 180 100 275 512 1.6 31 20
Athlon 600 Pluto 250 100 300 512 1.6 50 32. 9
Orion 180 100 300 512 1.6 34 21.5
Athlon 650 Pluto 250 100 325 512 1.6 54 35.5
Orion 180 100 325 512 1.6 36 22.9
Thunderbird 180 100 650 256 1. 7 36.1 23.8
Athlon 700 Pluto 250 100 350 512 1.6 50 33.1
Orion 180 100 350 512 1.6 39 24.4
Thunderbird 180 100 700 256 1.7 38.3 25. 2
Athlon 750 Orion 180 100 300 512 1.6 40 25.8
Thunderbird 180 100 750 256 1.7 40.4 26.6
Athlon 800 Orion 180 100 320 512 1.7 48 29.5
Thunderbird 180 100 800 256 1. 7 42.6 28
Athlon 850 Orion 180 100 340 512 1.7 50 30
Thunderbird 180 100 850 256 1.7 44.8 29.4
Athlon 900 Orion 180 100 300 512 1.8 60 34
Thunderbird 180 100 900 256 1. 75 49.7 31.7
Athlon 950 Orion 180 100 316 512 1.8 62 35
Thunderbird 180 100 950 256 1.75 52 33.2
Athlon 1000 Orion 180 100 333 512 1.8 65 37
Thunderbird 180 100 1000 256 1. 75 54.3 34.7


In June 2000, the first member of the Socket A family, the Athlon Model 4 Thunderbird Socket A, enters the market.



Athlon «C» 1000 Thunderbird with 133 MHz bus

They also had a black backing, like my Athlon 900, which, under a voltage of 1.8V, worked on a 127MHz bus — almost 1.15GHz in total.

The bus frequency is 100 and 133 MHz, but data is being transmitted on both edges of the signal (DDR), so the effective data rate is 200 and 266 MHz, respectively.

Model Core FSB (MHz) Level 2 cache (L2) Core voltage (V) Maximum heat dissipation (W) Maximum current consumption (A)
Athlon «B» 650 Thunderbird 100 256 1. 7 38 23
Athlon «B» 700 Thunderbird 100 256 1.7/1.75 38.3/40.0 25.2/23.0
Athlon «B» 750 Thunderbird 100 256 1.7/1.75 40.4/43.0 26.6/25.0
Athlon «B» 800 Thunderbird 100 256 1.7/1.75 42.6/45.0 28.0/26.0
Athlon «B» 850 Thunderbird 100 256 1. 7/1.75 44.8/47.0 29.4/27.0
Athlon «B» 900 Thunderbird 100 256 1.75 50 29
Athlon «C» 900 Thunderbird 133 256 1.75 50 29
Athlon «B» 950 Thunderbird 100 256 1.75 52 30
Athlon «B» 1000 Thunderbird 100 256 1. 75 54.3 34.6
Athlon «C» 1000 Thunderbird 133 256 1.75 54 31
Athlon «B» 1100 Thunderbird 100 256 1.75 60 34
Athlon «C» 1100 Thunderbird 133 256 1.75 60.3 34
Athlon «C» 1133 Thunderbird 133 256 1. 75 62.1 36
Athlon «B» 1200 Thunderbird 100 256 1.75 66 38
Athlon «C» 1200 Thunderbird 133 256 1.75 65.7 37
Athlon «C» 1266 Thunderbird 133 256 1.75 66.9 38
Athlon «B» 1300 Thunderbird 100 256 1. 75 68 39
Athlon «C» 1333 Thunderbird 133 256 1.75 69.8 39.9
Athlon «B» 1400 Thunderbird 100 256 1.75 72.1 42
Athlon «C» 1400 Thunderbird 133 256 1.75 72.1 42


Sites from which information was used in one way or another:

  • amd. com
  • amdclub.ru
  • amdclub.narod.ru
  • interdacom.ru
  • soft-service.ru
  • thg.ru.

As well as own knowledge and experience :).

I.N.

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Processors

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AMD K7 architecture

Details
Parent category:

processors

Category: AMD K7

architecture

The creation of the seventh generation K7 processor core in 1999 was a significant achievement for AMD. The Athlon processor features outstanding technical features: three parallel execution pipelines, a double frequency front-side bus with rising and falling data, an asynchronous memory bus, and highly intelligent decoder and data prefetch blocks.

The first-level cache includes a dual-channel partially associative (set-associative) instruction cache and a data cache with a capacity of 64 KB each. The K7 data cache provides simultaneous access to two 64-bit values ​​when executing register load and memory write instructions. Another important feature of the K7 is the presence of a special pre-decoding cache in the instruction cache block, which is used by instruction decoders. Recall that in modern x86-compatible processors, direct execution of x86 commands does not occur, since they are inconvenient for achieving maximum performance. x86 instructions are decoded into simpler and more efficient internal fixed-length RISC-like instructions, which, in fact, are executed by the microprocessor.

There are three such decoders in the K7 core, and they work in parallel, so the pre-decode cache contributes significantly to increasing throughput.

In addition, the L1 instruction cache contains a two-level fast page forwarding TLB used to convert virtual to physical addresses: the L1 TLB has a capacity of 24 lines, and the L2 TLB has a capacity of 256 lines. A similar TLB in the first level data cache includes a first level TLB with a capacity of 32 lines and a second level TLB with a capacity of 256 lines. Finally, the first-level instruction cache contains a large branch prediction table with a capacity of 2048 lines, which makes it possible to achieve a high probability of correct dynamic branch prediction.

From the decoders, the commands enter the command control device with a capacity of 72 lines. AMD K7 is a superscalar microprocessor with out-of-order speculative instruction execution. The large capacity of the command control device makes it possible to efficiently use the resources of nine functional executive devices that are pipelined and capable of out-of-order execution of commands. These devices include three address pipelines, three integer pipelines, and three floating point pipelines. Accordingly, K7 can perform up to 9commands per clock. The total length of the integer pipeline in K7 is 10 stages, and the floating point pipeline is 15 stages.

The capacity of the integer instruction scheduler is 18 lines; through it, commands are sent to both integer and addressable functional units. A similar instruction scheduler for floating point numbers has a capacity of 36 lines. It is worth dwelling on the operation of the floating-point instruction block in more detail.

First of all, we note that this block provides operation with single (32 bits), double (64 bits) and extended (80 bits) precision. In addition, these functional actuators work with data in the MMX and 3DNow! instruction formats. The FSTORE actuator executes register loading and memory writing commands. The FADD block, in addition to adding floating-point operands, executes addition instructions from the 3DNow! and MMX shift commands. The FMUL block, in addition to multiplying floating-point numbers, executes MMX commands, 3DNow! and special division operations. Thus, the K7 can simultaneously perform floating point addition and multiplication in the FADD and FMUL blocks. This gives a peak performance of two real operations per clock.

Functional diagram of the K7 microarchitecture
Details
Parent category:

processors

Category: AMD K7

architecture

The most important component that determines the performance of the microprocessor are the characteristics of the external cache in the second level and the external system bus of the processor. The dedicated bus between K7 and the L2 cache has a width of 64 bits plus 8 bits to support ECC codes. Theoretically, the maximum capacity of the second level cache in the K7 is 8 MB. The use of a 512 KB L2 cache in real Athlon processors is in a certain sense the most efficient, since the L2 cache controller integrated into the K7 contains full tags for a 512 KB cache, and with a larger cache capacity, the controller will contain only a part of the tag.

Details
Parent category:

processors

Category: AMD K7

architecture

With the K7 microarchitecture, AMD engineers introduced support for SMP architectures for the first time. The protocol that maintains cache coherence in K7 is called MOESI (from the first letters of the possible cache states — Modify, Owner, Exclusive, Shared, Invalid). According to AMD, this protocol was first implemented in x8b-compatible processors.

The L1 cache in K7 has a separate port through which coherent traffic passes. Cache coherency support traffic is also separated from the main traffic on the system bus. Naturally, decoupling increases the effective throughput of the bus, and hence the efficiency of SMP configurations.

Details
Parent category:

processors

Category: AMD K7

architecture

The AMD K7 bus has two great features. Firstly, this is not an ordinary common bus, but a switch. This solution provides guaranteed throughput for point-to-point connections, while conflicts are possible on a common bus. Secondly, the K7 system bus has a frequency of up to 400 MHz. With a bus width of 64 bits plus 8 ECC bits, it has a throughput of up to 3.2 GB/s. A high-speed bus is needed not only to support fast DDR RAM, but also to provide I / O streams from the PCI and AGP buses.

The K7 system bus interface is electrically compatible with the Alpha EV6 bus protocol. The K7 microprocessor is connected to the bus via the Socket A (Socket 462) interface. An important feature that affects the throughput of the K7 bus is the amount of packets transmitted over the bus. This bursting of data contributes to the pipelined processing of transactions on the bus. For the K7, the burst size is 64 bytes (the length of the cache line), which is twice that of the P6 generation processors. Separate transaction processing contributes to the efficient use of the system bus. It allows you to overlap the execution of various transactions in time, allowing you to start processing new transactions without waiting for the completion of the previous ones. Theoretically, the maximum capacity of bus-addressable RAM in the K7 is 8 TB, but in reality, chipsets support up to 4 GB.

Details
Parent category:

processors

Category: AMD K7

architecture

In October 2001, the first Athlon processors based on the Palomino core entered the market. This modification was given the XP index (eXtreme Performance), emphasizing the innovations of the architecture in comparison with the «regular» Athlon. So, in particular, the mechanism for translating the addresses of commands and data into physical memory addresses has undergone a significant alteration. To speed up access to commands and data, all modern processors have a Translation Look-aside Buffer (TLB). This buffer caches, but not data or commands, but their physical addresses. In previous Athlon processors, this buffer was two levels. The first level (L1) has a capacity of 24 values ​​for instruction addresses and 32 values ​​for data addresses. The second level (L2) could store up to 256 data addresses and 256 instruction addresses.

The size of the first level buffer has been increased in the Palomino core, now it can store up to 40 data address values. In addition, now TLB, as well as the main cache, has become «exclusive» — ​​exclusive. This means that the contents of the first level buffer do not duplicate the contents of the second level buffer. And finally, the new kernel implements a mechanism for loading new address values ​​ahead of time (before they may be required) — speculatively reload.

Significantly improved mechanism for forward loading of data from memory to cache. This data-ahead mechanism was also implemented in early processors, but only for instructions included in 3DNow! and SSE. The core of Athlon XP processors continuously analyzes the addresses of the data requested by the processor and the sequence in which they were requested. Based on the analysis, an attempt is made to predict the addresses of the data that will be requested, and forward loading of this data into the processor cache. In many cases, for example, when cyclic processing of large data arrays, the prediction will be successful. This improves performance even for non-optimized applications.

Both the 3DNow! instruction system and the SSE instruction system are fully implemented in the Palomino kernel. This complex set is called 3DNow! professional technology.

These changes required another increase in the number of transistors — up to 37.5 million. However, this did not lead to an increase in power consumption.