Processor identification for amd: AMD CPU identification processor

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v · d · e

Below is a list of CPUIDs of AMD x86 processors broken down by processor family, microarchitecture, and processor design codename.

Contents

  • 1 CPUIDs
    • 1.1 Family 25 (19h)
    • 1.2 Family 24 (18h)
    • 1.3 Family 23 (17h)
    • 1.4 Family 22 (16h)
    • 1.5 Family 21 (15h)
    • 1.6 Family 20 (14h)
    • 1.7 Family 19 (13h)
    • 1.8 Family 18 (12h)
    • 1.9 Family 17 (11h)
    • 1.10 Family 16 (10h)
    • 1.11 Family 15 (0Fh)

This article is a work in progress!

Family 25 (19h)[edit]

Microarchitecture Extended
Family
Base
Family
Extended
Model
Base
Model
Stepping Silicon Products
Zen 4 0xA 0xF 0x7 Ryzen 7000 APU «Phoenix» (AM5, FP8) (rumor)
0xA 0xF 0x6 «Raphael»? (AM5)
Zen 3 0xA 0xF 0x5 0x0 CZN-A1? Ryzen 5000 APU «Cezanne» (AM4, FP6)
0xA 0xF 0x4 0x4
0xA 0xF 0x4 0x0 «Rembrant»? (AM5, FP7?)
Zen 3 0xA 0xF 0x2 0x1 VMR-B0[1] Ryzen 5000 «Vermeer» (AM4)
Zen 4 0xA 0xF 0x1 0x0 0x0 RS-A0[2] Engineering Sample (SP5)[2]
Zen 3 0xA 0xF 0x0 0x8 Threadripper 5900 «Chagall» (sWRX8)
0xA 0xF 0x0 0x1 0x2 GN-B2[3] Engineering Sample (SP3)[3]
0xA 0xF 0x0 0x1 0x1 GN-B1[3] EPYC 7003 «Milan» (SP3)[3]
0xA 0xF 0x0 0x1 0x0 GN-B0[3] Engineering Sample (SP3)[3]
0xA 0xF 0x0 0x0 0x0 Genesis GN-A0[3] Engineering Sample (SP3)[3]
  1. ↑ «Processor Programming Reference (PPR) for AMD Family 19h Model 21h, Revision B0 Processors», AMD Publ. #56214, Rev. 3.05, April 22, 2021
  2. 2.02.1 «Revision Guide for AMD Family 19h Models 10h–1Fh Processors», AMD Publ. #57095, Rev. 0.71, July 2021
  3. 3.03.13.23.33.43.53.63.7 «Revision Guide for AMD Family 19h Models 00h-0Fh Processors», AMD Publ. #56683, Rev. 1.04, June 2021

Family 24 (18h)[edit]

Family 18h distinguishes processors produced by a joint venture between AMD and Chinese companies.

Microarchitecture Extended
Family
Base
Family
Extended
Model
Base
Model
Codename
Chengdu Haiguang Integrated Circuit Design Co., Ltd (Hygon)
Zen 0x9 0xF 0x0 0x0 Dhyana

Family 23 (17h)[edit]

Microarchitecture Design Extended
Family
Base
Family
Extended
Model
Base
Model
Zen 2 Van Gogh 0x8 0xF 0x9 0x0 Family 23 Model 144
Matisse 0x8 0xF 0x7 0x1 Family 23 Model 113
Lucienne 0x8 0xF 0x6 0x8 Family 23 Model 104
Renoir, Grey Hawk 0x8 0xF 0x6 0x0 Family 23 Model 96
Xbox Series X 0x8 0xF 0x4 0x7 Family 23 Model 71
Rome, Castle Peak 0x8 0xF 0x3 0x1 Family 23 Model 49
Zen+ Picasso 0x8 0xF 0x1 0x8 Family 23 Model 24
Colfax, Pinnacle Ridge 0x8 0xF 0x0 0x8 Family 23 Model 8
Zen Dali 0x8 0xF 0x2 0x0 Family 23 Model 32
Banded Kestrel 0x8 0xF 0x1 0x8 Family 23 Model 24
Raven Ridge, Great Horned Owl 0x8 0xF 0x1 0x1 Family 23 Model 17
Naples, Whitehaven, Summit Ridge, Snowy Owl 0x8 0xF 0x0 0x1 Family 23 Model 1

Family 22 (16h)[edit]

Microarchitecture Extended
Family
Base
Family
Extended
Model
Base
Model
Silicon Package Products
Puma 0x7 0xF 0x3 0x0 ML-A1[1], 4C, 28 nm FT3b A-Series/E-Series APU «Beema», A-Series/E-Series Micro APU «Mullins» (low power), Embedded G-Series «Steppe Eagle» & «Crowned Eagle», Embedded G-Series LX-Family
Enhanced Jaguar 0x7 0xF  ?  ?  ?, 8C, 16 nm BGA-2409[2] Xbox One X «Scorpio Engine»
Jaguar 0x7 0xF  ?  ?  ?, 8C, 28 nm Xbox One SoC
0x7 0xF 0x0 0x0 KB-A1[3], 4C, 28 nm FT3 A-Series/E-Series APU «Kabini» (mainstream) & «Temash» (low power), Embedded G-Series SOC «Kabini», Opteron X1100 & Opteron X2100 APU «Kyoto»
  1. ↑ «Revision Guide for AMD Family 16h Models 30h-3Fh Processors», AMD Publ. #53072, Rev. 3.00, May 2, 2014
  2. ↑ Paternoster, Paul; Maki, Andy; Hernandez, Andres; Grossman, Mark; Lau, Michael; Sutherland, David; Mathad, Aditya (2021). 3.1 XBOX Series X: A Next-Generation Gaming Console SoC. 2021 IEEE International Solid-State Circuits Conference. pp. 46-48. doi:10.1109/ISSCC42613.2021.9366057
  3. ↑ «Revision Guide for AMD Family 16h Models 00h-0Fh Processors», AMD Publ. #51810, Rev. 3.06, June 2013

Family 21 (15h)[edit]

Microarchitecture Extended
Family
Base
Family
Extended
Model
Base
Model
Silicon Products
Excavator 0x6 0xF 0x7 0x0 ST-A0[1] «Stoney Ridge»
0x6 0xF 0x6 0x5 BR-A1 «Bristol Ridge»
0x6 0xF 0x6 0x0 CZ-A1 «Carrizo»
0x6 0xF  ?  ? Embedded G-Series I-Family «Brown Falcon», J-Family «Prairie Falcon»
Steamroller 0x6 0xF 0x3 0x8 GV-A1 «Godavari»
0x6 0xF 0x3 0x0 KV-A1[2] «Kaveri»
0x6 0xF 0x3  ? «Bald Eagle»
Piledriver 0x6 0xF 0x1 0x3 RL-A1 «Richland»
0x6 0xF 0x1 0x0 TN-A1[3] «Trinity»
0x6 0xF 0x0 0x2 Orochi OR-C0[4], 8C, 32 nm 2×8C Opteron 6300 «Abu Dhabi» & «Warsaw» (G34), Opteron 4300 «Seoul» (C32), Opteron 3300 «Delhi» (AM3+), AMD FX «Vishera» (AM3+)
Bulldozer 0x6 0xF 0x0 0x1 Orochi OR-B2[4], 8C, 32 nm 2×8C Opteron 6200 «Interlagos» (G34), Opteron 4200 «Valencia» (C32), Opteron 3200 «Zurich» (AM3+), AMD FX «Zambezi» (AM3+)
  1. ↑ «Revision Guide for AMD Family 15h Models 70h-7Fh Processors», AMD Publ. #55370, Rev. 3.00, July 12, 2016
  2. ↑ «Revision Guide for AMD Family 15h Models 30h-3Fh Processors», AMD Publ. #51603, Rev. 1.06, April 21, 2014
  3. ↑ «Revision Guide for AMD Family 15h Models 10h-1Fh Processors», AMD Publ. #48931, Rev. 3.10, May 2013
  4. 4.04.1«Revision Guide for AMD Family 15h Models 00h-0Fh Processors», AMD Publ. #48063, Rev. 3.24, September 30, 2014

Family 20 (14h)[edit]

Microarchitecture Design Extended
Family
Base
Family
Extended
Model
Base
Model
Bobcat Desna, Ontario, Zacate 0x5 0xF 0x0  ?

Family 19 (13h)[edit]

Family 18 (12h)[edit]

Microarchitecture Extended
Family
Base
Family
Extended
Model
Base
Model
Silicon Products
Llano 0x3 0xF 0x0 0x0 LN1-B0 A8, A6, A4 APU «Llano» (FM1)

Family 17 (11h)[edit]

Family 16 (10h)[edit]

Microarchitecture Extended
Family
Base
Family
Extended
Model
Base
Model
Silicon[1] Package Products
K10 0x1 0xF 0x0 0xA PH-E0, 6C, 45 nm AM3 Phenom II X6 «Thuban», Phenom II X4 «Zosma», Athlon II X4
0x1 0xF 0x0 0x9 HY-D1, 6C, 45 nm G34 2×6C Opteron 6100 «Magny Cours», Embedded Opteron
0x1 0xF 0x0 0x8 HY-D0/D1 C32 Opteron 4100 «Lisbon», Embedded Opteron
0x1 0xF 0x0 0x8 HY-D0 Fr6 Opteron 2400/8400 «Istanbul», Embedded Opteron
0x1 0xF 0x0 0x6 DA-C2/C3, 2C, 45 nm AM3 Athlon II X2, Athlon II, Athlon II XL & XLT (embedded), Sempron X2, Sempron
0x1 0xF 0x0 0x6 DA-C2/C3 S1g3/S1g4 Phenom II N/P/X, Turion II Ultra M600 «Caspian», Turion II M500, Athlon II M300, Sempron M100, V-Series
0x1 0xF 0x0 0x6 DA-C2/C3 ASB2 Turion II Neo N/K «Geneva», Athlon II Neo N/K/R, V-Series
0x1 0xF 0x0 0x5 BL-C2/C3, 4C, 45 nm AM3 Athlon II X2/X3/X4
0x1 0xF 0x0 0x4 RB-C2, 4C, 45 nm Fr2/Fr5 Opteron 2300/8300 «Shanghai»
0x1 0xF 0x0 0x4 RB-C2/C3 AM3 Opteron 1300 «Suzuka», Phenom II X2/X3/X4, Phenom II XLT (embedded)
0x1 0xF 0x0 0x4 RB-C2 AM2+ Phenom II X3/X4, Athlon X2
0x1 0xF 0x0 0x2 DR-B2/B3/BA, 4C, 65 nm Fr2 Opteron 2300/8300 «Barcelona», Embedded Opteron
0x1 0xF 0x0 0x2 DR-B2/B3 AM2+ Opteron 1300 «Budapest», Phenom X4 «Agena», Phenom X3 «Toliman», Athlon X2 «Kuma»
  1. ↑ «Revision Guide for AMD Family 10h Processors», AMD Publ. #41322, Rev. 3.92, March 2012

Family 15 (0Fh)[edit]

This family covers two CPU generations. Models 00h-2Fh are first generation Athlon 64 and Opteron processors with an integrated DDR memory controller. Models 40h and higher are members of the «NPT Family 0Fh». NPT is the New Platform Technology processor architecture encompassing server, desktop, and mobile platforms.[1] These processors have a DDR2 memory interface.

All processors of Family 0Fh use the K8 microarchitecture.

Having exhausted the 4-bit Base Family field, Family 0Fh introduced new CPUID semantics following the example of Intel’s Family 0Fh. On processors with a Base Family lower than 0xF the Extended Family and Extended Model fields are reserved and should be considered zero. On Family 0Fh processors the extended fields are valid, and the value of the Extended Family field must be added to the Base Family to distinguish Family 10h and later processors from Family 0Fh members. [2]

Adding the Extended Family to a Base Family stuck at 0Fh, rather than Extended Family providing high order bits, prevents legacy software evaluating only the base fields from identifying Family 10h and later processors as very old models missing required features.

Extended
Family
Base
Family
Extended
Model
Base
Model
Stepping Silicon[3] Socket/
Package
Products
0x0 0xF 0xC 0x1 0x3 JH-F3, 2C, 90 nm Fr3 Athlon 64 FX «Windsor» (Quad FX platform)
0x0 0xF 0x7 0xF 0x1/0x2 DH-G1/G2 AM2 Athlon 64, Athlon, Sempron
0x0 0xF 0x7 0xF 0x2 DH-G2 ASB1 Athlon Neo, Sempron
0x0 0xF 0x6 0xF 0x2 DH-G2 AM2 Athlon 64, Sempron
0x0 0xF 0x6 0xF 0x2 DH-G2 ASB1 Athlon Neo, Sempron
0x0 0xF 0x6 0xB 0x1/0x2 BH-G1/G2, 2C, 65 nm AM2 Athlon 64 X2, Athlon X2, Athlon Neo X2, Sempron
0x0 0xF 0x6 0xB 0x1/0x2 BH-G1/G2 ASB1 Athlon Neo X2, Turion Neo X2
0x0 0xF 0x6 0x8 0x1/0x2 BH-G1/G2 S1g1 Turion 64 X2, Turion 64, Athlon 64 X2, Sempron
0x0 0xF 0x5 0xF 0x2/0x3 DH-F2/F3, 90 nm AM2 Athlon 64, Athlon, Sempron
0x0 0xF 0x5 0xD 0x3 JH-F3 Fr1 Opteron
0x0 0xF 0x4 0xF 0x2 DH-F2 AM2 Athlon 64, Sempron
0x0 0xF 0x4 0xC 0x2 DH-F2 S1g1 Turion 64, Athlon 64, Sempron
0x0 0xF 0x4 0xB 0x2 BH-F2 AM2 Athlon 64 X2
0x0 0xF 0x4 0x8 0x2 BH-F2 S1g1 Turion 64 X2, Athlon 64 X2
0x0 0xF 0x4 0x3 0x2/0x3 JH-F2/F3, 2C, 90 nm AM2 Opteron 1200 «Santa Ana», Athlon 64 FX «Windsor», Athlon 64 X2
0x0 0xF 0x4 0x1 0x2 JH-F2 Fr1 Opteron 2200/8200 «Santa Rosa»
Extended
Family
Base
Family
Extended
Model
Base
Model
Stepping Silicon[4] Socket Products
0x0 0xF 0x2 0xF 0x0/0x2 DH-E3/E6 939 Athlon, Sempron
0x0 0xF 0x2 0xC 0x2 DH-E6 754 Sempron, Mobile Sempron
0x0 0xF 0x2 0xC 0x0 DH-E3 754 Sempron
0x0 0xF 0x2 0xB 0x1 BH-E4 939 Athlon 64 X2 «Manchester»
0x0 0xF 0x2 0x7 0x1 SH-E4, 90 nm 939 Opteron 1xx «Venus», Athlon 64 FX, Athlon
0x0 0xF 0x2 0x5 0x1 SH-E4 940 Opteron 1xx/2xx/8xx «Venus/Troy/Athens»
0x0 0xF 0x2 0x4 0x2 SH-E5 754 Turion, Mobile Athlon 64
0x0 0xF 0x2 0x3 0x2 JH-E6 939 Opteron 1xx «Denmark», Athlon 64 X2 & Athlon 64 FX «Toledo»
0x0 0xF 0x2 0x1 0x0/0x2 JH-E1/E6, 2C, 90 nm 940 Opteron 1xx/2xx/8xx «Denmark/Italy/Egypt»
0x0 0xF 0x1 0xF 0x0 DH-D0 939 Athlon, Sempron
0x0 0xF 0x1 0xC 0x0 DH-D0 754 Athlon, Sempron, Mobile Athlon 64, Mobile Sempron
0x0 0xF 0x1 0xC 0x0 SH-D0 754 Mobile Athlon XP-M
0x0 0xF 0x1 0xB 0x0 CH-D0 939 Athlon
0x0 0xF 0x1 0x8 0x0 CH-D0 754 Athlon, Mobile Athlon 64, Mobile Athlon XP-M, Mobile Sempron
0x0 0xF 0x1 0x7 0x0 SH-D0 939 Athlon, Athlon 64 FX
0x0 0xF 0x1 0x5 0x0 SH-D0 940 Opteron, Athlon 64 FX
0x0 0xF 0x1 0x4 0x0 SH-D0 754 Athlon, Mobile Athlon 64, Mobile Athlon XP-M
0x0 0xF 0x0 0xF 0x0 DH-C6 939 Sempron
0x0 0xF 0x0 0xC/0xE 0x0 DH-CG 754 Mobile Athlon 64, Mobile Athlon XP-M, Sempron, Mobile Sempron
0x0 0xF 0x0 0x8 0x2 CH-CG 754 Mobile Athlon 64, Mobile Athlon XP-M, Mobile Sempron
0x0 0xF 0x0 0x7 0xA SH-CG 939 Athlon 64, Athlon 64 FX
0x0 0xF 0x0 0x5 0x8/0xA SH-C0/CG, 130 nm 940 Opteron 1xx/2xx/8xx, Athlon 64 FX
0x0 0xF 0x0 0x5 0x0/0x1 SH-B0/B3, 130 nm 940 Opteron 1xx/2xx/8xx «SledgeHammer»
0x0 0xF 0x0 0x4 0x8/0xA SH-C0/CG 754 Athlon 64, Mobile Athlon 64, Mobile Athlon XP-M
0x0 0xF 0x0 0x4 0x0 SH-B0 754 Athlon 64
  1. ↑ «BIOS and Kernel Developer’s Guide for AMD NPT Family 0Fh Processors», AMD Publ. #32559, Rev. 3.16, October 31, 2009
  2. ↑ «AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions», AMD Publ. #24594, Rev. 3.32, March 2021
  3. ↑ «Revision Guide for AMD NPT Family 0Fh Processors», AMD Publ. #33610, Rev. 3.48, December 13, 2011
  4. ↑ «Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors», AMD Publ. #25759, Rev. 3.79, July 20, 2009

AMD Plumbing Linux Support For Reading The CPU’s Protected Processor Identification Number (PPIN)

Written by Michael Larabel in AMD on 19 March 2020 at 07:23 PM EDT. 21 Comments

Going back to Ivy Bridge processors, Intel has supported «PPIN» as the Protected Processor Identification Number as a globally unique identification number set in the factory. It turns out recent AMD CPUs are also supporting PPIN and that reading their value is about to be supported on Linux.

The Protected Processor Identification Number (PPIN) is effectively a unique serial number for each processor. One of the intended use-cases for PPIN is in large data centers and multi-socket servers to be able to more easily identify a particular CPU, especially in case of problems. At least in Intel’s case, Intel can also translate a customer’s PPIN number back into the fab and production run of that particular CPU along with any other internal data in isolating any issues. Intel has supported reading the PPIN under Linux for years and plumbed it into the MCE (Machine Check Exception) code for allowing server administrators to potentially more easily identify a particular CPU in the event of problems as well as tracking CPU inventory.

AMD developers have been working on a patch for PPIN support within the AMD MCE code. The patch basically follows Intel’s implementation given their implementations of PPIN are nearly identical. The patch only mentions «newer» AMD CPUs support this feature and not specifying if that means Zen 2 or forthcoming Zen 3 or potentially only implemented by EPYC CPUs (the actual code is simply checking a particular feature bit, waiting to hear any clarification from AMD).

For now the AMD PPIN number is just being reported as part of the MCE logs and not exposed by other means, for those concerned about this globally unique CPU identifier being used for tracking purposes.

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About The Author

Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.

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Benchmark leaks can no longer be trusted — Ryzen processor names proved to be easy to fake

3DNews Technologies and IT market. News processors Leaks from benchmarks can no longer be trusted…

The most interesting in the reviews


10/28/2022 [23:49],

Andrey Sozinov

It’s no secret that benchmarks can be fooled, and this week another trick was found. It turned out that AMD Ryzen processors can be easily renamed, thereby giving out the results of testing a more powerful chip for the results of a younger one.

It all started with the fact that the Geekbench benchmark database showed the results of tests of Ryzen 7000 processors that have not yet been presented, which looked quite plausible and were widely dispersed in the specialized media — we also had material on this subject. In the end, it turned out that this was all a fake organized by the Chips and Cheese website to show why such «leaks» should not be trusted.

The PMCReader utility allows you to issue one processor after another. As Chips and Cheese explains, modern AMD processors have six registers for writing the CPUID. With the help of the mentioned utility, these registers can be easily changed (up to 48 characters can be entered), thereby issuing one CPU after another.

This is how the Core i9-13900K can be made slower than the Core i9-12900K in a single-threaded test

Registers are usually written at CPU boot time. Applications such as Geekbench, CPU-Z, AIDA64 and others check just these registers to identify the CPU and display the result of the check in the system information. At the same time, the rest of the specifications are shown absolutely, right. However, there are applications that use other mechanisms, and they will not work. These are, in particular, HWiNFO and BenchMate.

The same fake Ryzen 7 7800X

Using the utility, you can get both a funny or unusual CPU name, for example, 3DNEWS, and a completely plausible one, as happened this week. The author of Chips and Cheese renamed the flagship Ryzen 9 7950X to Ryzen 7 7800X, turned off six of the sixteen cores and lowered the frequency, after which the resulting “new product” was tested in Geekbench. After that, a screenshot with the test result of the 10-core Ryzen 7 7800X, which AMD is allegedly preparing for release, began to spread on the Web. And many believed this leak.

The processor was turned into a famous meme

Thus, now it has become even more difficult to trust leaks with tests of certain processors that have not yet been presented. It may well turn out that we have just a fake created for the sake of a joke.

Sources:


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